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| ELECTRONICS INC. 10/100 Base-X Module for ICS 1890 & SSI 78Q2120 Multi-Port Applications EPF8047S * Significantly improved common mode attenuation * * Guaranteed to operate with 8 mA DC bias at 70C * * Complies with or exceeds IEEE 802.3, 10 BT/100 BX Standards * Electrical Parameters @ 25 C OCL @ 70C 100 KHz, 0.1 Vrms 8 mA DC Bias Media Side 350H Insertion Loss (dB Max.) 0.1-80 MHz 80-100 MHz 150 MHz 1-30 MHz Return Loss (dB Min.) 30-60 MHz 100 MHz Common Mode Rejection (dB Min.) 30-100 MHz 200 MHz 300-500 MHz Crosstalk (dB Min.) [Between Channels] 0.1-60 MHz 60-100 MHz Xmit Rcv Xmit Rcv Xmit Rcv Xmit Rcv Xmit Rcv Xmit Rcv Xmit Rcv Xmit Rcv Xmit Rcv -1 -1 -1 * -1 -3 -3 -18 -18 -18 -18 -10 -10 -40 -40 -30 -20 * -20 -10 -35 -35 Isolation : 1500 Vrms * Impedance : 100 * Rise Time : 3.0 nS Max. Schematic Receive Channel 6, 16 7, 17 8, 18 1 CT:1CT Chip Side Media Side Chip Side 35, 25 34, 24 33, 23 2, 12 3, 13 4, 14 1 CT:1CT C M T Transmit Channel 39, 29 38, 28 37, 27 Media Side Package A J N Dim. A B C D E F G H I J K L M N P Q Min. 1.110 .470 .240 .950 .008 .050 .620 .016 .008 .085 0 .045 Dimensions (Inches) Max. Nom. 1.130 .490 .250 Typ. .012 Typ. .630 .022 .012 Typ. 8 Typ. .030 .050 .090 .670 (Millimeters) Min. Max. Nom. 28.19 28.70 11.94 12.45 6.10 6.35 24.13 Typ. .203 .305 1.27 Typ. 15.75.. 16.00 406 .559 .203 .305 2.16 Typ. 0 8 1.14 Typ. .762 1.27 2.29 17.02 PCA EPF8047S Date Code B Q 40 21 P Solder Pad Layout 1 20 D M I C F H E K L G PCA ELECTRONICS, INC. 16799 SCHOENBORN ST. NORTH HILLS, CA 91343 CSF8047Sa Rev. Orig. 1/8/97 TEL: (818) 892-0761 FAX: (818) 894-5791 http://www.pcainc.com ELECTRONICS INC. 10/100 Base-X Module for ICS 1890 & SSI 78Q2120 Multi-Port Applications EPF8047S The circuit below is a guideline for interconnecting PCA's EPF8047S with ICS 1890 chip for 10/100 Mb/s applications. Further details can be obtained from the chip manufacturer application notes. Connection to the alternative chip SSI 78Q2120 is straight forward; please consult the SSI data sheet recommendations for completing this project. Typical insertion loss of the isolation transformer is 0.5dB. This parameter covers the entire spectrum of the encoded signals in 10/100 protocols. Under terminated conditions, to transmit a 2V pk-pk signal across the cable, you must adjust the chips supporting resistor to get at least 2.12V pk-pk across the transmit pins. Primary side center taps can be returned to the chip side ground plane; but more often than not, if the ground plane is itself noisy, field experience has shown that it may worsen EMI situation. It is perhaps wiser to carefully lay the system borad so that substantial gain in EMI suppression is obtained from the so called "common mode termination" on the cable side as shown below. In any event, this configuration has been known to be quite successful in the field in EMI containment for similar applications. The phantom resistors shown around the connector have been known to suppress unwanted radiation that unused wires pick up from the immediate environment. Their placement and use are to be considered carefully before a design is finalized. It is recommended that there be a neat separation of ground planes in the layout. It is generally accepted practice to limit the plane off at least 0.05 inches away from the chip side pins of EPF8047S. There need not be any ground plane beyond this plane. For best results, PCB designer should design the outgoing traces preferably to be 50 , balanced and well coupled to achieve minimum radiation from these traces. Typical Application Circuit for UTP (only one port shown) 5Vcc 3 35 33 39 1 2 3 6 Rcv TX+ 2 4 6 8 7 Xmit 37 34 75 50 ICS 1890 TXRX+ RX- RJ45* 4 5 50 38 7 8 EPF8047S CM Capacitor Chassis Ground High Voltage Capacitor Notes : Only one port shown for Hub side connection. PCA ELECTRONICS, INC. 16799 SCHOENBORN ST. NORTH HILLS, CA 91343 CSF8047Sb Rev. Orig. 1/8/97 TEL: (818) 892-0761 FAX: (818) 894-5791 http://www.pcainc.com |
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